| Senior ASIC Design Engineer | Astera Labs | Israel | 2026-07-17 |
| Principal Supplier Quality Engineer | Astera Labs | Taipei, Taiwan | 2026-07-17 |
| Technical Lead Physical Design Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior Director System Validation Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Silicon Validation Engineer, SerDes/PAM4 | Astera Labs | San Jose, United States | 2026-07-17 |
| Expert IC Package Design Lead | Astera Labs | Israel | 2026-07-17 |
| Principal Signal and Power Integrity Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Analog / Mixed-Signal Layout Engineer | Astera Labs | Singapore, Singapore | 2026-07-17 |
| IP Design Verification Director | Astera Labs | Bengaluru, India | 2026-07-17 |
| Field Application Engineering Intern | Astera Labs | Taipei, Taiwan | 2026-07-17 |
| System Validation Engineer (Various Levels) | Astera Labs | Vancouver, Canada | 2026-07-17 |
| Senior Principal Digital Design Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Digital Design Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Technical Lead Digital Design Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Hardware Lab Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior/ Staff Formal Verification Engineer | Astera Labs | Israel | 2026-07-17 |
| Senior/ Staff Package Design Engineer | Astera Labs | Israel | 2026-07-17 |
| Staff/ Principal Physical Design STA Engineer | Astera Labs | Israel | 2026-07-17 |
| Staff/ Principal Chip Top Physical Design Engineer | Astera Labs | Israel | 2026-07-17 |
| Field Applications Engineer | Astera Labs | Taipei, Taiwan | 2026-07-17 |
| Senior/ Staff Physical Design Engineer - EMIR CAD | Astera Labs | Israel | 2026-07-17 |
| Principal Design Verification Engineer | Astera Labs | United States | 2026-07-17 |
| Technical Lead Product Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Lead ATE Test Engineer | Astera Labs | Taiwan | 2026-07-17 |
| Manager, Package Design Engineering | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal System Validation Engineer (AI Fabric Switches) | Astera Labs | San Jose, United States | 2026-07-17 |
| Physical Design/CAD Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| DFT Design Engineering Director | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Product Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior Principal Engineering Program Manager | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior Digital Design Engineer, IP and Methodology | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Product Applications Engineer | Astera Labs | Taipei, Taiwan | 2026-07-17 |
| Principal Product Application Engineer - Leo | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior Principal System Validation Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal IP Signoff & Methodology Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Physical Design Engineer, STA | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior Firmware Engineer - PCIe/CXL Memory Solutions | Astera Labs | San Jose, United States | 2026-07-17 |
| Physical Design Engineer (Place & Route) | Astera Labs | San Jose, United States | 2026-07-17 |
| Optical Firmware Engineer, Principal | Astera Labs | San Jose, United States | 2026-07-17 |
| Manager, Physical Design Engineer | Astera Labs | Toronto, Canada | 2026-07-17 |
| Senior Product Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Product Quality Engineer (NCG) | Astera Labs | San Jose, United States | 2026-07-17 |
| Senior Firmware Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Optical Test Engineer, Tech Lead | Astera Labs | San Jose, United States | 2026-07-17 |
| Photonic Packaging Engineer, Principal | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Field Applications Engineer | Astera Labs | Taipei, Taiwan | 2026-07-17 |
| Principal Product Applications Engineer - Ethernet | Astera Labs | San Jose, United States | 2026-07-17 |
| Technical Lead Design Verification Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Optical Module Validation Engineer | Astera Labs | San Jose, United States | 2026-07-17 |
| Principal Product Application Engineer - PCIe | Astera Labs | San Jose, United States | 2026-07-17 |